Security of Internet of Things Nodes

Challenges, Attacks, and Countermeasures

Chinmay Chakraborty, Sree Ranjani Rajendran, Muhammad Habibur Rehman, Chinmay Chakraborty, Sree Ranjani Rajendran, Muhammad Habibur Rehman, Muhammad Habib ur Rehman, Chinmay Chakraborty, Sree Ranjani Rajendran, Muhammad Habib ur Rehman

• Publisher: Chapman and Hall/CRC
• Year: 2021
• Print ISBN: 9780367650513
• eBook ISBN: 9781000422474
• Topic: Ciencia de la computación
• Subtopic: Computación en la nube

The book Security of Internet of Things Nodes: Challenges, Attacks, and Countermeasures® covers a wide range of research topics on the security of the Internet of Things nodes along with the latest research development in the domain of Internet of Things. It also covers various algorithms, techniques, and schemes in the field of computer science with state-of-the-art tools and technologies. This book mainly focuses on the security challenges of the Internet of Things devices and the countermeasures to overcome security vulnerabilities. Also, it highlights trust management issues on the Internet of Things nodes to build secured Internet of Things systems. The book also covers the necessity of a system model for the Internet of Things devices to ensure security at the hardware level.

1

Securing Dedicated DSP Co-processors (Hardware IP) using Structural Obfuscation for IoT-oriented Platforms

Anirban Sengupta¹ and Dipanjan Roy²

Indian Institute of Technology Indore

Institute for Development and Research in Banking Technology, Hyderabad

1.1 Introduction

IoT is omnipresent in today’s world. IoT applications find space in smart homes, smart cities, smart healthcare systems, wearable electronics, smart grids, connected cars, and in many other applications. The Internet of Things can exist with conventional microcontrollers and System on Chips (SoCs), but issues such as low power requirements and wireless support have accelerated the development of platforms designed for IoT applications. Thus, DSP coprocessors play a pivotal role for developing SoC-based IoT applications (Schneiderman, 2010). However, considering globalization in the design process, hardware security support for such devices is a must. Many industries use specialised coprocessors for IoT platforms such as 32-bit DSP for sensor fusion support, a 128-neuron pattern-matching accelerator, and other peripheral modules such as Bluetooth Low Energy (BLE) support and a six-axis accelerometer and gyroscope. In an SoC, these DSP coprocessors are mostly used as a reusable intellectual property (IP) core to cope with the time to market pressure (Castillo, Meyer-Baese, Garcia, Parrilla, & Lloris, 2007). For all-inclusive hardware security, the protection of these DSP coprocessors is pivotal (Sengupta & Roy, 2019). Due to the globalization of the supply chain, the design process of a SoC is distributed among multiple countries in the world. Multiple third parties with their specific expertise contribute in various phases. Therefore, the possibility of the presence of an attacker is very high. These DSP IP cores are the primary targets for these kinds of attackers. The major attacks which target these DSP IP cores are Reverse Engineering (RE) (Torrance & James, 2009), IP counterfeiting and Trojan insertion. Though RE is permitted for analysis, evaluation and education purposes, it is prohibited to use that knowledge for any illegal purpose. In the RE attack, the objective of the attackers is to gain complete information about the design. They try to identify the device technology, extract the gate-level netlist, and infer the IP functionality. This knowledge helps them to identify a suitable place to insert a malicious logic, known as hardware Trojan. Additionally, a successful RE attack also helps the attackers to perform IP counterfeiting. They can clone or copy then resell the design to other vendors. Therefore, the RE attack has a deep-rooted impact on the security of IoT devices. Researchers have incorporated multiple solutions using different security algorithms during the design process of these reusable DSP IP cores. However, such processes are segregated into multiple design abstraction levels: architectural, register-transfer, gate, physical, etc. Integrating the security algorithms in the early design phases has multiple benefits. Moreover, as most of the DSP applications have a complex function associated with them, starting the design process with the topmost design abstraction level (i.e. architectural level), is compulsory. The architectural level has the advantages of securing the design in the lower design phases and having the flexibility to perform a trade-off between multiple design parameters such as silicon area, execution latency and power consumption. One of the popular solutions against the RE attack is obscuring the design or making it unidentifiable to the attackers. This process is known as hardware obfuscation (Zhang, 2016). Hardware obfuscation prevents attacks by enhancing RE complexity. The hardware obfuscation process, which converts the DSP IP design into an unobvious form without affecting the functionality of the DSP application, is known as structural obfuscation. Compared to watermarking (Newbould, Carothers, & Rodriguez, 2002; Ni & Gao, 2005; Colombier & Bossuet, 2015; Sengupta & Roy, 2017; Le Gal & Bossuet, 2012; Ziener & Teich, 2008; Hong & Potkonjak, 1999; Koushanfar, Hong, & Potkonjak, 2005), fingerprinting (Roy & Sengupta, 2017), and forensic engineering-based detective approach, structural obfuscation (Li & Zhou, 2013; Sengupta, Roy, Mohanty, & Corcoran, 2017; Sengupta, Roy, Mohanty, & Corcoran, 2018; Lao & Parhi, 2015) is more robust as it is a preventive hardware security approach. It prevents the attackers from identifying the functionality of a DSP application from its structure. Thus, it hinders the RE process. Structural obfuscation also indirectly protects the design from hardware Trojan insertion, IP cloning, IP piracy, and other methods. Normally, the RE process requires lots of tools and techniques. It is also quite titime-consuming. Therefore, converting a standard DSP structure into an unobvious form makes it too difficult to launch an attack. The robustness of the secured design after incorporating structural obfuscation is measured using a metric known as Strength of Obfuscation (SoO) or Power of Obfuscation (PoO) (Sengupta et al., 2017). This metric measures the amount of dissimilarity between the non-obfuscation design (also known as baseline design) and the obfuscated design. Because it incorporates the structural obfuscation algorithm, it can also be measured by the number of gates affected (Sengupta & Rathor, 2020; Sengupta & Rathor, 2019). A higher percentage of dissimilarity or affected gate count indicates higher robustness. The typical attack and protection scenario for DSP coprocessors used in IoT devices is shown in Figure 1.1. This chapter discusses four state-of-the-art structural obfuscation approaches proposed by various researchers. All these approaches target DSP application for providing protection. The analysis of their corresponding results is shown in the subsequent section.

Figure 1.1
Typical attack and protection scenario for IoT devices.

1.2 Discussion on Contemporary Structural Obfuscation Approaches used for Securing DSP Hardware/Coprocessor

Workflow of the methodology is sh...

Table of contents

• Cover
• Half Title
• Series Page
• Title Page
• Copyright Page
• Contents
• Preface
• About the Editors
• 1 Securing Dedicated DSP Co-processors (Hardware IP) using Structural Obfuscation for IoT-oriented Platforms
• 2 Multi-bit True Random Number Generator for IoT Devices using Memristor
• 3 Secured Testing of AES Cryptographic ICs for IoT Devices
• 4 Biometric-based Secure Authentication for IoT-enabled Devices and Applications
• 5 An Improved Verification Scheme Based on User Biometrics
• 6 Obfuscation to Mitigate Hardware Attacks in Edge Nodes of IoT System
• 7 Lightweight Security Solutions for IoT using Physical-Layer-Key Generation
• 8 Threat and Attack Models in IoT Devices
• 9 Review on Hardware Attacks and Security Challenges in IoT Edge Nodes
• 10 Study of Hardware Attacks on Smart System Design Lab
• 11 A Novel Threat Modeling and Attack Analysis for IoT Applications
• 12 Trust Management in Internet-of-Things Devices
• Index