Embedded Multiprocessors
Scheduling and Synchronization, Second Edition
- 380 pages
- English
- PDF
- Available on iOS & Android
Embedded Multiprocessors
Scheduling and Synchronization, Second Edition
About This Book
Techniques for Optimizing Multiprocessor Implementations of Signal Processing Applications
An indispensable component of the information age, signal processing is embedded in a variety of consumer devices, including cell phones and digital television, as well as in communication infrastructure, such as media servers and cellular base stations. Multiple programmable processors, along with custom hardware running in parallel, are needed to achieve the computation throughput required of such applications.
Reviews important research in key areas related to the multiprocessor implementation of multimedia systems Embedded Multiprocessors: Scheduling and Synchronization, Second Edition presents architectures and design methodologies for parallel systems in embedded digital signal processing (DSP) applications. It discusses application modeling techniques for multimedia systems, the incorporation of interprocessor communication costs into multiprocessor scheduling decisions, and a modeling methodology (the synchronization graph) for multiprocessor system performance analysis. The book also applies the synchronization graph model to develop hardware and software optimizations that can significantly reduce the interprocessor communication overhead of a given schedule.
Chronicles recent activity dealing with single-chip multiprocessors and dataflow models This edition updates the background material on existing embedded multiprocessors, including single-chip multiprocessors. It also summarizes the new research on dataflow models for signal processing that has been carried out since the publication of the first edition.
Harness the power of multiprocessors This book explores the optimization of interprocessor communication and synchronization in embedded multiprocessor systems. It shows you how to design multiprocessor computer systems that are streamlined for multimedia applications.
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Table of contents
- COVER
- TITLE
- COPYRIGHT
- FOREWORD
- PREFACE
- CONTENTS
- CHAPTER 1: INTRODUCTION
- CHAPTER 2: APPLICATION-SPECIFIC MULTIPROCESSORS
- CHAPTER 3: BACKGROUND TERMINOLOGY AND NOTATION
- CHAPTER 4: DSP-ORIENTED DATAFLOW MODELS OF COMPUTATION
- CHAPTER 5: MULTIPROCESSOR SCHEDULING MODELS
- CHAPTER 6: IPC-CONSCIOUS SCHEDULING ALGORITHMS
- CHAPTER 7: THE ORDERED-TRANSACTIONS STRATEGY
- CHAPTER 8: ANALYSIS OF THE ORDEREDTRANSACTIONS STRATEGY
- CHAPTER 9: EXTENDING THE OMA ARCHITECTURE
- CHAPTER 10: SYNCHRONIZATION IN SELF-TIMED SYSTEMS
- CHAPTER 11: RESYNCHRONIZATION
- CHAPTER 12: LATENCY-CONSTRAINED RESYNCHRONIZATION
- CHAPTER 13: INTEGRATED SYNCHRONIZATION OPTIMIZATION
- CHAPTER 14: FUTURE RESEARCH DIRECTIONS
- BIBLIOGRAPHY
- INDEX
- ABOUT THE AUTHORS