The VLSI Handbook
eBook - PDF

The VLSI Handbook

  1. 2,320 pages
  2. English
  3. PDF
  4. Available on iOS & Android
eBook - PDF

The VLSI Handbook

Book details
Table of contents
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About This Book

For the new millenium, Wai-Kai Chen introduced a monumental reference for the design, analysis, and prediction of VLSI circuits: The VLSI Handbook. Still a valuable tool for dealing with the most dynamic field in engineering, this second edition includes 13 sections comprising nearly 100 chapters focused on the key concepts, models, and equations.Written by a stellar international panel of expert contributors, this handbook is a reliable, comprehensive resource for real answers to practical problems. It emphasizes fundamental theory underlying professional applications and also reflects key areas of industrial and research focus. WHAT'S IN THE SECOND EDITION?

Sections onā€¦

  • Low-power electronics and design
  • VLSI signal processing

Chapters onā€¦

  • CMOS fabrication
  • Content-addressable memory
  • Compound semiconductor RF circuits
  • High-speed circuit design principles
  • SiGe HBT technology
  • Bipolar junction transistor amplifiers
  • Performance modeling and analysis using SystemC
  • Design languages, expanded from two chapters to twelve
  • Testing of digital systems

Structured for convenient navigation and loaded with practical solutions, The VLSI Handbook, Second Edition remains the first choice for answers to the problems and challenges faced daily in engineering practice.

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Information

Publisher
CRC Press
Year
2018
ISBN
9781420005967
Edition
2
Topic
Technology & Engineering
Subtopic
Electrical Engineering & Telecommunications
Index
Technology & Engineering

Table of contents

  1. Front cover
  2. Preface
  3. Editor-in-Chief
  4. Contributors
  5. Table of Contents
  6. Section I. VLSI Technology
  7. Chapter 1. Bipolar Technology
  8. Chapter 2. CMOS/BiCMOS Technology
  9. Chapter 3. Silicon-on-Insulator Technology
  10. Chapter 4. SiGe HBT Technology
  11. Chapter 5. Silicon Carbide Technology
  12. Chapter 6. Passive Components
  13. Chapter 7. Power IC Technologies
  14. Chapter 8. Microelectronics Packaging
  15. Chapter 9. Multichip Module Technologies
  16. Section II. Devices and their Models
  17. Chapter 10. Bipolar Junction Transistor Circuits
  18. Chapter 11. RF Passive IC Components
  19. Chapter 12. CMOS Fabrication
  20. Chapter 13. Analog Circuit Simulation
  21. Chapter 14. Interconnect Modeling and Simulation
  22. Section III. Low Power Electronics and Design
  23. Chapter 15. System-Level Power Management: An Overview
  24. Chapter 16. Communication-Based Design for Nanoscale SoCs
  25. Chapter 17. Power-Aware Architectural Synthesis
  26. Chapter 18. Dynamic Voltage Scaling for Low-Power Hard Real-Time Systems
  27. Chapter 19. Low Power Microarchitecture Techniques
  28. Chapter 20. Architecture and Design Flow Optimizations for Power-Aware FPGAs
  29. Chapter 21. Technology Scaling and Low-Power Circuit Design
  30. Section IV. Amplifiers
  31. Chapter 22. CMOS Amplifier Design
  32. Chapter 23. Bipolar Junction Transistor Amplifiers
  33. Chapter 24. High-Frequency Amplifiers
  34. Chapter 25. Operational Transconductance Amplifiers
  35. Section V. Logic Circuits
  36. Chapter 26. Expressions of Logic Functions
  37. Chapter 27. Basic Theory of Logic Functions
  38. Chapter 28. Simplification of Logic Expressions
  39. Chapter 29. Binary Decision Diagrams
  40. Chapter 30. Logic Synthesis with AND and OR Gates in Two Levels
  41. Chapter 31. Sequential Networks
  42. Chapter 32. Logic Synthesis with AND and OR Gates in Multi-Level
  43. Chapter 33. Logic Properties of Transistor Curcuits
  44. Chapter 34. Logic Synthesis with NAND (or NOR) Gates in Multi-Levels
  45. Chapter 35. Logic Synthesis with a Minimum Number of Negative Gates
  46. Chapter 36. Logic Synthesizer with Optimizations in Two Phases
  47. Chapter 37. Logic Synthesizer by the Transduction Method
  48. Chapter 38. Emitter-Coupled Logic
  49. Chapter 39. CMOS
  50. Chapter 40. Pass Transistors
  51. Chapter 41. Adders
  52. Chapter 42. Multipliers
  53. Chapter 43. Dividers
  54. Chapter 44. Full-Custom and Semi-Custom Design
  55. Chapter 45. Programmable Logic Devices
  56. Chapter 46. Gate Arrays
  57. Chapter 47. Field-Programmable Gate Arrays
  58. Chapter 48. Cell-Library Design Approach
  59. Chapter 49. Comparison of Different Design Approaches
  60. Section VI. Memory, Registers and Sysem Timing
  61. Chapter 50. System Timing
  62. Chapter 51. ROM/PROM/EPROM
  63. Chapter 52. SRAM
  64. Chapter 53. Embedded Memory
  65. Chapter 54. Flash Memories
  66. Chapter 55. Dynamic Random Access Memory
  67. Chapter 56. Content-Addressable Memory
  68. Chapter 57. Low-Power Memory Circuits
  69. Section VII. Analog Circuits
  70. Chapter 58. Nyquist-Rate ADC and DAC
  71. Chapter 59. Oversampled Analog-to-Digital and Digital-to-Analog Converters
  72. Chapter 60. RF Communication Circuits
  73. Chapter 61. PLL Circuits
  74. Chapter 62. Switched-Capacitor Filters
  75. Section VIII. Microprocessor and ASIC
  76. Chapter 63. Timing and Signal Integrity Analysis
  77. Chapter 64. Microprocessor Design Verification
  78. Chapter 65. Microprocessor Layout Method
  79. Chapter 66. Architecture
  80. Chapter 67. Logic Synthesis for Field Programmable Gate Array (FPGA) Technology
  81. Section IX. Testing of Digital Systems
  82. Chapter 68. CAD DFT and Test Architectures
  83. Chapter 69. Automatic Test Pattern Generation
  84. Chapter 70. Built-In Self-Test
  85. Section X. Compound Semiconductor Integrated Circuit Technology
  86. Chapter 71. Compound Semiconductor Materials
  87. Chapter 72. Compound Semiconductor Devices for Analog and Digital Circuits
  88. Chapter 73. Compound Semiconductor RF Circuits
  89. Chapter 74. High-Speed Circuit Design Principles
  90. Section XI. Design Automation
  91. Chapter 75. Internet-Based Micro-Electronic Design Automation (IMEDA) Framework
  92. Chapter 76. System-Level Design
  93. Chapter 77. Performance Modeling and Analysis Using VHDL and SystemC
  94. Chapter 78. Embedded Computing Systems and Hardware/Software Co-Design
  95. Chapter 79. Design Automation Technology Roadmap
  96. Section XII. VLSI Signal Processing
  97. Chapter 80. Computer Arithmetic for VLSI Signal Processing
  98. Chapter 81. VLSI Architectures for JPEG 2000 EBCOT: Design Techniques and Challenges
  99. Chapter 82. VLSI Architectures for Foreward Error-Control Decoders
  100. Chapter 83. An Exploration of Hardware Architectures for Face Detection
  101. Chapter 84. Multidimensional Logarithmic Number System
  102. Section XIII. Design Languages
  103. Chapter 85. Languages for Design and Implementation of Hardware
  104. Chapter 86. System Level Design Languages
  105. Chapter 87. RT Level Hardware Description with VHDL
  106. Chapter 88. Register Transfer Level Hardware Description with Verilog
  107. Chapter 89. Register-Transfer Level Hardware Description with SystemC
  108. Chapter 90. System Verilog
  109. Chapter 91. VHDL-AMS Hardware Description Language
  110. Chapter 92. Verification Languages
  111. Chapter 93. ASIC and Custom IC Cell Information Representation
  112. Chapter 94. Test Languages
  113. Chapter 95. Timing Description Languages
  114. Chapter 96. HDL-Based Tools and Environments
  115. Index
  116. Back cover