This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

Most up-to-date coverage of design for testability.
Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.

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Yes, you can access VLSI Test Principles and Architectures by Laung-Terng Wang,Cheng-Wen Wu,Xiaoqing Wen in PDF and/or ePUB format, as well as other popular books in Design & Industrial Design. We have over one million books available in our catalogue for you to explore.

Information

Publisher

Morgan Kaufmann

Year

2006

ISBN

9780080474793

Topic

Design

Subtopic

Industrial Design

Front Cover
VLSI Test Principles and Architectures: Design for Testability
Copyright
Contents
Preface
In the Classroom
Acknowledgments
Contributors
About the Editors
Chapter 1: Introduction
Chapter 2: Design for Testability
Chapter 3: Logic and Fault Simulation
Chapter 4: Test Generation
Chapter 5: Logic Built-In Self-Test
Chapter 6: Test Compression
Chapter 7: Logic Diagnosis
Chapter 8: Memory Testing and Built-In Self-Test
Chapter 9: Memory Diagnosis and Built-In Self-Repair
Chapter 10: Boundary Scan and Core-Based Testing
Chapter 11: Analog and Mixed-Signal Testing
Chapter 12: Test Technology Trends in the Nanometer Age
Index