Computer Integrated Electronics Manufacturing and Testing

Jack Arabian, Arabian

• Publisher: CRC Press
• Year: 2020
• eBook ISBN: 9781000147117
• Topic: Technology & Engineering
• Subtopic: Electrical Engineering & Telecommunications
• Index: Technology & Engineering

This informative book describes the computer integrated manufacturing and testing process as it relates to the electronics industry-focusing on such important areas as printed wiring boards, networking, automatic assembly, surface mount technology, tape automated bonding, bar coding, and electro-static discharge.

Treating both basic and advanced topics, Computer Integrated Electronics Manufacturing and Testing covers specialized manufacturing processes ... examines the life cycle of a product, from concept and design to manufacturing and testing through maintenance and field service ... studies the effects of group work ethics as a factor in the success equation ... considers the importance of product quality . . . discusses Computer Integrated Manufacturing ... explores Artificial Intelligence and its relation to manufacturing ... contains end-of-chapter references, charts, over 100 photographs, and detailed appendixes that list definitions, abbreviations, and industry buzz words ... plus more.

Timely, comprehensive, and highly practical, the volume is an ideal resource for all engineers involved in computer integrated electronics manufacturing and testing.

1
The Printed Wiring Board (FWB) in Electronics Manufacturing

1.1 INTRODUCTION

The printed wiring board (PWB) is an important component of electronic assemblies. Historically, it has been regarded more as a mounting medium for electrical components: a platform through which they could be interconnected. In the evolution of electronic circuits, however, other considerations such as faster operation, higher reliability, and intense competition require the components to be closer together, more densely populated, and to provide a greater number of input/output (I/O) connections. Higher frequencies and narrower line widths and spacings soon require greater attention to board parameters such as line capacitance, controlled impedance, and heat dissipation.

It is appropriate, therefore, to begin this volume with a study of the design, construction, and operation of the PWB in order to better understand its role in computer-integrated electronics manufacturing and testing. For example, at higher operating frequencies, the PWB becomes more and more a microwave component and more information is needed on such topics as:

1. Skin effect (high-frequency fields forcing current to flow more on the outside of a conductor)
2. Signal integrity: the effects of crosstalk, noise, coupling, and line capacitance on the desired signal quality
3. Standing wave ratios (SWRs) and multiples of wavelength for impedance matching and line loss measurements
4. Time domain reflectometry (TDR): a test method for Quantifying the high-frequency characteristics of a bare board

For details on the aļbpve topics, see the chapter entitled “Manufacturing Test,” under the sections entitled “Bare Board Test” and “Dynamic High Speed Functional Test.”

In this chapter, therefore, the PWB in electroríifíẸ manufacturing will be viewed not only as a component in the assembly process jbtii ạļso as a qualified mechanical and/or electrical/electronic component in the selection and testing process.

1.2 HISTORICAL PERSPECTIVE ON PRINTED WIRING BOARDS

The PWB was preceded by the sheet metal (usually aluminum) chassis on which all electrical and electronic components were tediously bracketed, socketed, screwed down, and individually hand-wired, trimmed, and soldered. As the age of plastics matured in parallel with electronics, designers found it convenient and desirable to use sheets of insulation (known as “boards”) such as Bakelite, and later, glass-epoxy resins such as G10 and FR4. In the late 1950s a variety of precut and predrilled boards became available, gradually replacing the aluminum chasses. Cutting devices for the glass-epoxy boards were developed for socket holes of vacuum tubes and transistors. A general-purpose rectangular matrix of predrilled holes evolved, which inspired the design of the dual in-line planar (DIP) rectangular integrated circuit (IC) packages and their appropriate sockets. Wherever possible, the IC package pins were spaced to align conveniently with the rows of holes in this substrate, thus minimizing the need for separate socket cutouts.

The demand for greater board performance increased the component population density, and hand-wired interconnection was soon obsolete. It was, in fact, the impossible attempts to hand-wire densely interconnected circuits which gave rise to the expression “rat’s nest.” In addition, the high numbers and density of the wiring created defects in the correctness and quality of connections, which, in turn, decreased the reliability of the equipment which it connected. The PWB was conceived to relieve these high-density wiring and reliability problems with the added advantages of consistent, high-quality, and more economical high-volume reproduction of connections. With the advent of the PWB, it became necessary to replace wires with etched copper foil and then to preplan the routing of these conductors carefully.

The physical layout of the board was developed by placing a large sheet of paper or vellum (usually with a much larger scale than the intended circuit) on at translucent glass “light table.” By today’s standards, the physical layout ẃä§ öf low density (only a Ö. 125-inch grid or greater). The designer routed the connections of an initial placement of components (resistors, capacitors, sockets, arid connectors) by inking tn the connection lines in black. It later became more effíĉî&ftf tó lay down precut Widths of black pressure-sensitive tape on the vellum. The íigM iëèfe allowed the designer to see both sides of the layout and routing simultaneously, thē labyrinth of lines swept slowly across the table as the designer laid the tape according to the desired connections between preplaced component holes. Indeed, as the requirement for ä ĝfëā½f number of lines per unit area increased, physical limitations in laying narrow täpē widths constrained the process. This, in parallel with the development of computer-aided tools, began the higher grid density trend from 0.125 to 0.100 inch and smaller. A benefit of these advances was to shorten design and development time. A new technology emerged with the ability to route circuit paths in the samē plane without intersecting and causing short circuits. Routing was modified as necessary by simply removing the tape and relocating it if interference or intersection problems were encountered. Occasionally, the designer rêåéhed an impasse and could not make the connection without intersecting another circuit päíh, In this case, small yellow-colored wires were physically added and soldered as jumpers over the difficult intersection. Later, this technique would serve as a method of changing circuit paths when engineering change orders (ECOs) were initiated. An appreciation of the rat’s nest wiriflg problem can be experienced by manufacturing engineers who are often burdened with 50 to 100 ECO wires on a PWB.

On the other side of the PWB layout drawing, components were relocated to facilitate the routing process. The large vellum was then photographically reduced to the required physical size and the image was transferred to a copper-clad board. Thus, masked like a stencil on the copper foil, the excess copper was chemically etched away, leaving an outline of the needed interconnections. This process, although now more sophisticated, is still in use to produce PWBs.

The routing of conductors today is performed by sophisticated, computer-assisted autorouters. The density of PWB lines is expressed in conductor width and spacing; for example, “8/12” means an 8-mil (0.008 inch) conductor width and 12-mil (0.012 inch) spaces between conductors. In this volume, “milịs]” refers to the linear dimension of “thousandth[s] of an inch.” “Fine line” densities of 5/5, 2/3, or even smaller are becoming commonplace.

Incidentally, the term routing in PWBs has two different meanings. In the present context, “routing” refers to the process of laying out routes of the interconnection paths. Another meaning, which is used later, refers to “routing” in the sense of cutting or friilling, as when a PWB outline is mechanically cut out from a larger piece of panel as described in the section entitled “PWB Construction and Assembly.”

Historically, the etched circuit board was called a printed circuit board (PCB). The name was appropriate as the printing of circuitry resembled the printing of text and graphics in the classical sense. As the process evolved into the use of photolithography techniques, the terminology of PCB ŵäš even more appropriate. There are those, however, who object to the word “circuit” in PCB on the grounds that the etch of a bare board is not the (complete) circuit, but merely the “wiring” or interconnectioïls of that circuit. As such, it is claimed, the bare board with its ėttïied pattern is more correctly a PWB and not a PCB. Of course, there åre techniques to “print” entire circuits on a substrate (base material like a board, ceramic wafer, or silicon support [see list of definitions]), including connections (wiring), resistors, capacitors, inductors, and semiconductors. See also the appendix entitled “Background on Screen Printing: Thick Film Circuits.” This special class would then qualify as a PCB under the more stringent definition described above.

In keeping with this discussion, then, all references in this book will be to the PWB, which represents the board on which a circuit wiring or connection pattern is printed, or, in the multilayer case, within the construction as well. Contrary to popular belief, printed wiring and printed circuit techniques are identical.

There is another process which “tacks” fine-diameter circuit wire to the surface of a board in a commercial technique known as Multiwire. Because the stitched wire is also coated with insulation, it is possible to cross or intersect wires on the same side of a barē board. This Multiwire technique is distinguished from the “printed wire” technique by defining an identicality between printed circuits and printed wiring as described above.

For completeness, the following is a partial list of other terms used for:

1. Bare board with printed circuit etched:
   1. card
   2. bare board
   3. circuit card
   4. circuit board
   5. second level interconnect package (with TAB being first level interconnect, for example) (see the chapter entitled “Surface Mount Technology (SMT) and Tape Automated Bonding (TAB)”
2. Printed wiring board with components added:
   1. populated PWB (or PCB)
   2. assembled PWB (or PCB)
   3. module
   4. PWB (or PCB) assembly
   5. printed wiring assembly (pwa)
   6. card assembly
   7. populated board
   8. assembled board
   9. loaded board
   10. stuffed board

1.3 DESIGN OF THE PRINTED WIRING BOARD FOR MANUFACTURING

When a board is to be manufactured, the drawings are generated in the modern factory from the CAD workstation (see list of definitions and Reference 1-01). The data base contains the relevant design and manufacturing parameters from a series of customer specifications. As the documentation and data are compiled, the ...

Table of contents

• Cover
• Half Title
• Series Page
• Title Page
• Dedication Page
• Preface
• Acknowledgments
• Contents
• Introduction
• Chapter 1 The Printed Wiring Board (PWB) in Electronics Manufacturing
• Chapter 2 Solder and Automated Soldering Processes
• Chapter 3 Automated Assembly Techniques
• Chapter 4 ESD (Electrostatic Discharge)
• Chapter 5 Bar Coding and Other Marking Systems
• Chapter 6 Manufacturing Test
• Chapter 7 Computer-Assisted Repair
• Chapter 8 Networking for Electronics Manufacturing
• Chapter 9 Surface Mount Technology (SMT) and Tape Automated Bonding (TAB)
• Chapter 10 Artificial Intelligence and Expert Systems in Manufacturing
• Chapter 11 Kaisha and Electronics Manufacturing
• Chapter 12 Waves of Opportunity
• Appendix A Contamination Problems of Pwbs During Manufacturing and Test
• Appendix B Intermetallic Formation in Solder Processing
• Appendix C Background on Screen Printing: Thick-Film Circuits
• Appendix D List of Abbreviations
• Appendix E List of Definitions
• Index