Fundamentals of Power Integrity for Computer Platforms and Systems

Joseph T. DiBene

• Publisher: Wiley
• Year: 2014
• ISBN:
  9781118826348
• Edition: 1
• Topic: Technology & Engineering
• Subtopic: Power Resources
• Index: Technology & Engineering

An all-encompassing text that focuses on the fundamentals of power integrity

Power integrity is the study of power distribution from the source to the load and the system level issues that can occur across it. For computer systems, these issues can range from inside the silicon to across the board and may egress into other parts of the platform, including thermal, EMI, and mechanical.

With a focus on computer systems and silicon level power delivery, this book sheds light on the fundamentals of power integrity, utilizing the author's extensive background in the power integrity industry and unique experience in silicon power architecture, design, and development. Aimed at engineers interested in learning the essential and advanced topics of the field, this book offers important chapter coverage of fundamentals in power distribution, power integrity analysis basics, system-level power integrity considerations, power conversion in computer systems, chip-level power, and more.

Fundamentals of Power Integrity for Computer Platforms and Systems:

• Introduces readers to both the field of power integrity and to platform power conversion
• Provides a unique focus on computer systems and silicon level power delivery unavailable elsewhere
• Offers detailed analysis of common problems in the industry
• Reviews electromagnetic field and circuit representation
• Includes a detailed bibliography of references at the end of each chapter
• Works out multiple example problems within each chapter

Including additional appendixes of tables and formulas, Fundamentals of Power Integrity for Computer Platforms and Systems is an ideal introductory text for engineers of power integrity as well as those in the chip design industry, specifically physical design and packaging.

Chapter 1
Introduction to Power Integrity

This book examines the design concepts of power delivery to modern microprocessors and other related high-speed silicon devices. Today this field is termed power integrity. This chapter provides the background information on what has driven the need for platform power integrity analysis in this relatively new field. The platform is essentially the computer board with its multiple silicon devices, in addition to the power sources, or converters, that power them. The subject of power conversion will be examined, in particular as it applies to areas relevant to power integrity engineering. For computer systems the power conversion is mainly in the DC–DC conversion area. The chapters that follow will discuss areas relevant to power integrity analysis—circuit and field theory, modeling, the power delivery network (PDN) and boundary analysis, and other system considerations—and end with an examination of system noise, loadline, and measurement techniques. The last chapter will introduce silicon power integrity, along with some advanced interrelated topics, because of the increasing interest now being given to silicon-level power and the problems associated with on-silicon and on-package power delivery.

In the present chapter, power integrity is defined in terms of the paths that make up the PDN. The paths and all their components comprise the PI (power integrity) domain. A historical review of the voltage and current changes over time (using the microprocessor as an example) is provided to show how silicon has been one of the driving forces behind the need for such fundamental power integrity analyses today. The concept of first principles is discussed, because utilizing known equations and circuit analysis helps one gain insight into complex problems prior to embarking on sophisticated modeling with numerical tools. A discussion of the limitations and boundaries in power distribution analysis follows covering the circuit limitations (noise sensitivity and silicon process technology) of many advanced devices today that can compromise the accuracy of results.

1.1 Definition for Power Integrity

Power integrity as a field of study includes power conversion, power distribution analysis, circuit analysis, and often the package/board/silicon system analysis. But PI is not limited to these subjects. The PI engineer should also be versed in thermal and mechanical basics because some problems needing to be solved may include these and components of other disciplines that impact the system under study. A simple, but somewhat limiting definition is:

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(Power Integrity)

The study of the efficacy of the power delivered from the source to the load within an electronic system.

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Today, power integrity engineers versed in other disciplines may need to consider in their analyses the system's source, load, and path. In the past power integrity engineers often excluded the source and load parts of a system. This is understandable because many power integrity problems focused only on the power distribution path. However, today, having knowledge of both the silicon load and the power source allows PI engineers to comprehend fully the complexities of the problems that they face. Conversely, many power conversion engineers are required to cross over into the power integrity domain in order to solve their domain's problems. It is therefore reasonable for engineers from both disciplines to move regularly into each other's domains in order to solve their problems satisfactorily.

As Figure 1.1 shows, the primary power source is the power converter. This is a type of DC–DC converter at the motherboard of the server, forming an inter computer platform. The power source to this converter is typically neglected in an analysis. The power converter includes a certain amount of decoupling for filtering and charge storage. In the middle of the figure is the PDN, or power distribution network. The PDN typically comprises passive elements from the printed circuit board all the way to the level of the silicon. All of the decoupling and interconnections are included, from the output of the voltage regulator to the load. The printed circuit board and/or design package was where the PI engineer focused in the past. With the more complex recent systems, the PI engineer must often optimize the performance of the silicon-level passive and active components, so the circuit load must be considered as well. Note that Figure 1.1 gives a schematic representation of circuit load behavior. This is because modeling the actual behavior of load transistors under all possible conditions is virtually impossible. Nonetheless, knowledge of load behavior is required for PI engineers to do their jobs, and PI engineers must work closely with silicon development teams to gather the data necessary to perform their analyses.

Figure 1.1 Power integrity domain and Scope of influence

For the PI engineer, at the start of a study, there are many complementary components to consider. Often these are thermal and even mechanical issues that contribute to delivery problems. It is then up to the PI engineer to rework the filter structures in the PDN and, together with the board and silicon teams, to ensure that the power delivery path is performing efficiently. Such analysis requires knowledge of the board's layout, its components, the power source, the load characteristics, the design package, noise coupling to other planes, EMI (electromagnetic interference) issues, and other items that may contribute (potentially) to the results of PI modeling. The assumptions that go into the analysis are a critical part of a PI engineer's responsibilities and the next chapters will explore in detail these assumptions.

1.2 Historical Perspective on Power Integrity Drivers

The idea of analyzing the power distribution path is not novel. Engineers have been working with the concept of measuring voltages and currents on power lines since the 1920s [1]. However, the need for advanced power integrity techniques in the computer was not realized until recently. The transition from virtually no power integrity analysis needed to its being required on virtually every platform developed today has been more dramatic than many technologists could have realized. Though noise, EMI, and signal fidelity have traditionally been areas of focus for the system designer, the need for advanced power integrity analysis, relative to the advent of the microprocessor, is still a recent event. Many conferences today are dedicating significant blocks of time to the multitude of papers written on the subject in just the past few years. The main factors behind this trend are a culmination of system metrics: the need for more stringent voltage and current requirements, the increase in voltage rail proliferation (internal and external to the silicon), a dramatic increase in platform and silicon signal densities, and device and platform cost pressures, to name just a few. As evidenced by the previous issues, many of these developments are clearly platform dependent. The issues though vary across each platform type. For example, voltage proliferation and current and voltage requirements may be the main issue on a server platform, whereas cost will typically dominate in a desktop, laptop, or tablet today. Nonetheless, the problems are very similar between them and the migration toward a deeper understanding of the state of the art is clearly needed today.

One very dramatic change that has occurred over the past two decades is in silicon power requirements. The relatively fast decline in source voltages and the sudden increase in currents delivered to silicon over this time has necessitated a stringent examination of the power delivery path—particularly for complex devices, such as microprocessors [3].¹ Figure 1.2 shows the voltage decline over time for microprocessor devices for the past 20 years. The changes in supply voltage have come about for a number of reasons. First, as complexity and transistor density has increased, so has the power required for the device. This has necessitated that the voltage be dropped to help reduce the overall power to the device. Second, as the silicon process geometries have shrunk, so has the requirement to reduce the voltages to the devices to prevent their damage. Thus manufacturing constraints and device physics have also driven the need to reduce the voltage to these devices as much as ...

Table of contents

• Cover
• Title Page
• Copyright
• Dedication
• Foreword
• Preface
• Acknowledgments
• Acronyms
• Chapter 1: Introduction to Power Integrity
• Chapter 2: Introduction to Platform Power Conversion
• Chapter 3: Review of Electromagnetic Field and Circuit Representations
• Chapter 4: Power Distribution Network
• Chapter 5: Power Integrity Time-Domain and Boundary Analysis
• Chapter 6: System Considerations for Power Integrity
• Chapter 7: Silicon Power Distribution and Analysis
• Appendix A: Table of Inductances for Commonly Used Geometries
• Appendix B: Spherical Coordinate System
• Appendix C: Vector Identities and Formulae
• Index
• End User License Agreement